Lol, Alienware is planning nVidia SMP on Intel 925X chipsets right now, so I’m not sure what nVidia is all about. Built into the PCI-E spec is a form of fast switching between interfaces. So, theoretically, one could use 4 of the 8 PCI-E channels per card to communicate between each other and still have AGP 4X performance full duplex to each card from the northbridge.
I suspect the reference may be to that chipset having 32 PCI-E lanes available to and from the northbridge, allowing for two full 16X slots (or one 32X I could see 3DLabs jumping on quickly) rather than the 16 lane with one card or 8 lanes each with two cards in two 16X slots.
And yes, the Opteron sockets for SMP can handle dual cores, as can the Socket T. Two others that are pretty common are Slot 1 (two cores and an L2 cache) and Slot 2 (four cores and an L2 cache), although I doubt we’ll see those coming back, it does give you the idea that Intel has been at this quite a bit longer than AMD has, despite their probable release of dual core chips earlier than Intel. In fact, Intel internally sampled dual and quad cored packages back in the 100 MHz bus Pentium II days, using two or four Pentium II Xeon cores and the 1 MB (in the case of Slot 1) and 2 MB (for Slot 2) cache module from such. The problem was pretty simple, heat. Beyond about 350 MHz, they had severe heat problems, and besides, you could do the same thing with a DP or QP motherboard, so it was scrapped.
